adviceLUNA / TRQer Support

[Question] Is there any restriction when I do WIRED-OR the nTRST signal and nSRST signal?

[Answer]
We do not recommend you to do WIRED-OR the nTRST signal and nSRST signal.

[Information]
If nTRST signal and nSRST signal are WIRED-OR, JTAG communication is not available while nSRST is asserted, because nTRST is also asserted.
In such cases, ICE invokes a forced break by connecting the target by JTAG after releasing the assertion of nRST signal.
Therefore the following restrictions are applied.

1. Cannot do the reset vector break even if you select the [Reset vector break]. (You can check the setting from [MPU] - [MPU-Specific settings] - [RESET])


2. After releasing the assertion of nSRST, the target program is executed until the forced break is invoked.


3. PC register is rewritten by 0 after the forced break is invoked if you select [Register to Set up Initial value]. (You can check the setting from [MPU] [MPU-specific settings]-[Reset].) Therefore it looks a break occurred at address 0, but actually the target program is executing. As a result, if you execute it from address 0, the initial processing of target program will be executed halfway, and then it will be reexecuted from address 0.